DepthAI NEW FFC (DM1090FFC)¶
The DM1090FFC baseboard has three FFC interfaces which allow for two 2-lane MIPI camera modules i.e. DM0250TG (stereo pair) and one BG0249 RGB camera module. There is also a chance to connect three 2-lane MIPI camera modules i.e. DM0250TG if DM0249 RGB camera module is not required.
Please note that only revision R1M1E1 and newer camera modules can be connected to the DM1090FFC. With DM1090FFC we gained support for 22-pin RPi camera interface. For that you will need a FFC from Arducam, which converts 26-pin Luxonis camera pinout to 22 pin RPi camera pinout.
In addition IMU over SPI support was also added to the DM1090FFC.
Board layout & dimensions¶
3x DM0250TG_R1M1E1 mono camera module interfaces or
2x DM0250TG_R1M1E1 and 1x DM0249_R1M1E1 RGB camera module interface
5V power input via barrel jack
USB 3.1 Gen 1 Type-C
Interface for Luxnois BW1099 DepthAI SoM
Pads for DepthAI SoM 1.8V SPI
Pads for DepthAI SoM 3.3V SDIO
Pads for DepthAI SoM 1.8V Aux Signals (I2C, UART, GPIO)
5V Fan OR USB Type-C
Design files produced with Altium Designer 20
The DM1090FFC is powered via USB Type-C or from a 5V, 5.5m x 2.5mm barrel jack, and interfaces to a host via USB 3.1 Gen1 Type-C. With cameras and the DepthAI SoM, total power consumption usually stays below the 900ma specification of USB 3, but Type-C power of 1.5A or greater is recommended.
Interfacing with the DepthAI SoM is also possible with DM1090FFC connector pads J3, J4, and J5. These pads are designed for the Amphenol/FCI 20021121-00010T1LF or equivalent. Please refer to the schematics for pinout information.
The reset button resets the Luxonis DepthAI SoM only. The boot button overrides boot mode to USB boot if different boot mode is set in NOR Flash and BW1099EMB SoM is used.
The 5V LED indicates 5V power is present on the DM1090FFC. The PG LED indicates “power good” from the DepthAI SoM. The “RUN” LED indicates that the DepthAI SoM is not in reset.
USB designs with FFC camera boards contain 3 different iterations, below is a flowchart which tries to explain the design progress flow: